a) Field of the Invention
The present invention relates to a semiconductor device and more particularly to a field effect semiconductor device comprising a compound semiconductor hereto-junction.
b) Description of the Related Art
A field effect compound semiconductor device which is typically represented by a high electron mobility transistor (HEMT) is a semiconductor device having a high quality with a high speed action, and has been used for such purposes as microwave communication, satellite communication, or the like. Recently, devices of high quality, and high reliability have been demanded, especially of a high efficiency, and high gain.
FIG. 4A shows schematically a fundamental construction of a field effect compound semiconductor device. An active layer 52 formed of an n-type GaAs is formed on an underlying crystal layer 51. The underlying crystal layer 51 is formed by growing, for example, a semi-insulating GaAs buffer film on a semi-insulating GaAs substrate.
Two current electrodes 53s and 53d are formed on an active layer 52 for allowing a current to flow through the active layer 52. Each of these current electrodes 53s and 53d form an ohmic contact with the active layer 52. One of the current electrodes serves as a source electrode 53s and the other serves as a drain electrode.
A gate electrode 56 is formed at a central position between the current electrodes 53s and 53d for controlling the current between the current electrodes. The gate electrode 56 forms a Schottky contact with the active layer 52.
Here, surface of the active layer 52 between the gate electrode 56 and the current electrodes 53s and 53d is passivated by a laminate of a silicon nitride film 54 and a silicon oxide film 55. The insulating laminate also plays a role of separating the gate electrode 56 from the active layer 52.
In this configuration, when a high voltage is applied between the gate electrode 56 and the drain electrode 53d, an electric field is concentrated at an end portion of the gate electrode 56, and a leak current is generated. The active layer 52 undergoes influences by impurity scattering, since it is doped with impurity.
A high electron mobility transistor (HEMT) is constituted by forming the active layer 52 with a non-doped electron traveling layer having a narrow band gap and an electron supply layer having a wide band gap and doped with an n-type impurity. Electrons within the electron supply layer move to the electron traveling layer and, thus, can move at a high speed inside a non-doped crystal having no impurity. Further, a narrow quantum well is formed on the electron traveling layer side of a hetero-junction at an interface between the electron supply layer and the electron traveling layer. The electrons more in the quantum well in the form of a two-dimensional electron gas.
Since gate electrode is separated from electron traveling layer, concentration of electric field at the end point of the gate electrode is moderated. A similar two-dimensional electron gas can be provided even in the case of doping impurities in the electron traveling layer. A semiconductor device having such a structure also has similar electrode configuration as the metal semiconductor field effect transistor (MESFET) as shown in FIG. 4A. In this specification, such semiconductor devices are also included in the field effect semiconductor device.
In the case of a MESFET, an active layer is a semiconductor layer that plays the role of a channel. In the case of a HEMT, an active layer is a laminate of an electron traveling layer and an electron supply layer.
For obtaining a high quality and a high reliability for a field effect compound semiconductor device, it is preferable to moderate a concentration of electric field at an end portion of a gate electrode. For a high speed action, it is preferable to reduce parasitic capacitance of each electrode. A surface depletion layer formed on the compound semiconductor crystal surface by such cause as an imperfection of crystal, adsorption of metal, oxygen, or the like, will give influence to the inside of the crystal. Thus, for providing a stability of action, surface of the active layer is preferably covered with a passivation film.
FIG. 4B shows schematically a structure of an improved field effect compound semiconductor device. An electron traveling layer 60 formed of a non-doped GaAs layer or an n-type GaAs layer is grown epitaxially on an underlying crystal layer 51. An n-type AlGaAs layer 61 serving as an electron supply layer and as a potential barrier layer is formed epitaxially on the electron traveling layer 60.
Further, a non-doped GaAs layer 62 is grown epitaxially on the electron supply layer 61 as a passivation layer. Surface of an active layer comprising the electron traveling layer 60 and the electron supply layer 61 is released from influences from outside, since it is covered with a protective layer 62 formed of a non-doped GaAs layer.
On the protection layer 62, is further formed a laminate of a silicon nitride film 54 and a silicon oxide film 55. The laminate forms an insulating protective layer.
An aperture is formed through the silicon oxide film 55 and the silicon nitride film 54. An aperture is also formed through the protective layer 62, while aligned with the aperture in the silicon oxide film 55 and the silicon nitride film 54. The surface of the electron supply layer is exposed in the thus formed contact hole.
A gate electrode 56 is formed in such a shape to fill the contact hole exposing the electron supply layer. The gate electrode 56 forms a Schottky contact with the electron supply layer 61.
The insulating protection layers 54 and 55 are also removed from both sides of the gate electrode 56. A source electrode 53s and a drain electrode 53d are formed on a surface of the protection layer 62. The source electrode 53s and the drain electrode 53d are alloyed and form ohmic contact with the electron supply layer 61 and the electron traveling layer 62.
This configuration moderates concentration of electric field at the end portion of gate electrode since the gate electrode is separated from an electron traveling layer 60 by an electron supply layer 61. It further reduces a parasitic capacitance between the gate electrode and the ohmic electrodes 53s and 53d since a surface of the electron supply layer 61 is covered with the protection layer 62 formed of a non-doped GaAs layer. The active layer is relieved from influences of the surface since it is covered with the protection layer 62.
However, this structure separates source electrode 53s and drain electrode 53d from active layer 61 by a protection layer 62. Thus, it becomes difficult to form a good ohmic contact with the active layer.
FIG. 4C shows a structure that can improve quality of ohmic electrodes. In this structure, portions of a protection layer 62 underneath a source electrode 53s and a drain electrode 53d is removed and the source electrode 53s and the drain electrode 53d directly contact an electron supply layer 61. Ohmic characteristic of the source electrode 53s and the drain electrode 53d is improved by eliminating interposition of a non-doped semiconductor layer.
As in the structure shown in FIG. 4B, influences of the surface are reduced at such surface regions of the active region not contacting the electrodes, and being covered with a protection layer 62 of non-doped GaAs.
In the construction as shown in FIG. 4C, ohmic electrodes 53s and 53d are formed as follows. A resist mask having apertures at regions for forming ohmic electrodes is formed. Ohmic electrode layers are deposited by electron beam (EB) deposition, sputtering, or the like. After forming electrode layers, the photo-resist film is removed by alkaline solution and, simultaneously, lift the electrode layers on the photo-resist film off. The step of lifting-off will be described in detail. First, the resist film is removed by a remover comprising orthodichlorbenzene of 55 wt %, phenol of 25 wt % alkylbenzenesulphonic acid of 20 wt % Then after rinsing the substrate with water, acid treatment with hydrochloric acid/water (HCl/H.sub.2 O=1/10), rinse with water, acid treatment with hydrofluoric acid/ammonium fluoride (HF/NH.sub.4 F=1/10), and rinse with water are successively performed.
However, in the solution treatment during lift-off step, notches that root into a surface of an active layer are formed by a so-called area effect in a shallow slit formed between the ohmic electrodes 53s and 53d and the protection layer 62. Size of a notch is not uniform because non-uniformity within a plane is so large and reproducibility of the same size is very low. But when a notch 64 is formed, it reduces a current, and thereby, operating characteristic of a semiconductor device is deteriorated.